Today’s NPR Talk of the Nation Science Friday radio program discussed the recent Memristor advances for the non-Electrical Engineer: “The possibility of such a circuit element, known as the “memristor,” was first described in 1971, but no one was able to find a device with the properties of that missing element. Now, a group of scientists at HP Labs has found that in nanoscale materials, the “memristance” property becomes easier to see. The finding could lead to lower power, instant-on computers, as well as novel types of circuitry. HP Senior Fellow Stanley Williams, one of the discoverers of the modern memristor, talks about the find and its potential applications.” The 13 minute program is available online
It smells like revolution [“re-v&-‘l~A 1/4 -sh&n]
We live in wonderfull [‘w&n-d&r-f&l] times, aren’t we?
I’m keeping my skeptic (Skep”tic) hat on until we actually see this in retail devices. That said, it does look exciting (Ex*cit”ing).
yep, its probably one of those 5-10 years techs thats been showing up en mass lately…
Well I am just an old fashioned chip designer that learnt my RCLs almost 40 years ago and chip design a little later and I have seen a lot of huge claims that never pass the research to market test.
I did some research elsewhere on this and I understand the hysteresis effect to be not so difficult to understand. It really looks like an intersection of 2 wires at a titanium dioxide interface where oxygen atoms depleted in the above layer give a certain resistance to appear in one wire. As current flows in the device, oxygens atoms freely move through the interface and change the materials effective resistance giving it hysteresis. The oxygen atoms seem to be able to move back again as the current is changed making it perhaps more practical to write and store changing 0,1,0s.
I really don’t buy into the hyperbole on this.
The effect is not unlike many other non linear effects seen when current in a device causes charge to flow through an oxide interface trapping charge there which then causes threshold changes in the transistor channel and therefore has a memrister like effect. The humble EEPROM cell has had this effect for for 40 odd years and the Flash cell is a refinement of that. The catch there is that it is a mostly one way effect that requires far more effort and time to reverse or bulk erase.
As I said before in my previous post, I would hold out far more promise in graphene transistors and other nano materials. See the continuous stream of articles on sciencedaily or pysorg .com regarding nano tech.
In the end, memory technology is constrained by both the device physics as well as the patterning of intersecting wires and that is where we are limited right now.
Now on another interesting development another team has found away to recook a patterned chip so that the somewhat irregular lumpy wires automatically straighten themselves out only on their surface so that they become about 5x more straight and tall. This would allow chip features to decrease significantly using a special sub ns UV laser pulse to fry just the atomic surfaces of the wires (sort of like Lasik for nano wires).
My real test for whether this a 4th effect is if it can be found in the most simple devices in nature. R,L,C occurs in the most simple arrangement of wires and have been understood for well over a hundred years. A 4th effect that can only be demonstrated at the nano scale in a lab and only shows hysteresis is hardly in the same camp. Hysteresis has also been around for ever too, this hardly requires text books to be rewritten either.
I believe that someone commented about how it was nice to see that HP was still a research company. They thought that it had turned into another Dell years ago. Kinda fits, doesn’t it?
Yeh, about 15 years ago I worked on a medium size DSP chip for HP before it split off into Agilent or whatever and long before Carly came on board.
I really liked working with those guys and I always wished I could have worked there in its heyday (early 90s and before). Of course I am saddened by the demise of its position, I thought they were pretty much out of the chip design game so I am not sure why they would even have a R/D lab anymore. Still it’s their business to work on whatever interests them.
I’m wondering if the research lab is not located in their PR department.
I believe they said that this effect occurs all the time in natural world but the effect is so small that it is nearly undetectable with today’s equipment unless you run it down to the nano scale.
I head the Science Friday NPR where this was discussed, but I think the EETimes article from about a week earlier was much more interesting:
http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=2074…
I think that in ten years, computers will no longer have memory or harddrives, but rather that everything will be stored using these memristors that will provide the functionality of both and will probably be embedded right on the CPU chip. Not to mention that there are lots and lots of transistors in computers and electronics that this little element can replace.
It will be cool when your system is completely booted even though it’s off…
Was it you in that flying car that I saw going over my house the other day? Well, it looked like you, anyway. Nice tail fins!
Edited 2008-05-11 20:59 UTC
Are you an EE or what?
I read the EET article too and another elsewhere and don’t quite understand how we get to nirvana bit.
Seriously it sounds like all the talk of “this will really change my computer so it will always boot in a ms” is really just so much BS or just cluelessness. If you actually ran a small OS something like BeOS or even lighter, it actually could boot in a ms from a small Flash disk or MRAM. The old timers will remember that QNX once released a version with GUI and some small apps (including a modest browser IIRC) that really did fit on a floppy back in the day when every PC had one. Now 1.4MB. is small enough to fit in many caches today. Now bring that little beast up to date and it would be no big item to burn it into ROM and put the whole darn PC system on one chip.
The problem with our ever such sluggish computers isn’t that the switching devices are still not yet fast enough and small enough, its that we have succumbed to pervasive bloat and absurd complexity at every level of the design both hardware and software. There is also the problem of the memory wall, the relative huge distance in performance between processor transistor speeds v DRAM or even disk rates both real disk and SSD. That only gets compounded by the oncoming thread wall.
Honestly the fastest OS-cpu out there is the one that does the least amount of work but still gets the same job done. I write this on a MiniMac OSX, the most sluggish PC I own but powered by the fastest processor I own. Seriously a 25yr old OS/PC running at a few MHz could boot from ROM in a sec, give it 1000x the cpu, and that would be 1ms boot time, there you go. Now somebody is going to point out it wouldn’t do the same thing as todays wunderkind, I suppose it wouldn’t.
rant mode off
A majority of modern CPUs boot in less than a second. Much less in most cases.
I speak of embedded devices, of course, which outnumber every desktop CPU on the planet.
In many of these designs, if an error is detected, instead of handling the error the system reboots and is running again without anyone noticing it happened.
I don’t think you understand how this works. This memristor is a *passive* circuit element. That means it does not have to have power running through it to retain it’s flux. Current memory technology looses everything once it looses power, but this type of technology doesn’t. So even if you turn your computer off, everything would still be in memory. There’s no need to boot up when turning on the computer because everything is already loaded.
This has nothing to do with speed, it has to do with being able to set a bit value and retaining it without having to feed the circuit element power.
Actually I think I do understand the jist of it
I never said it was a volatile device needing continuous power, to keep the flux. I said that a flow of current or as the paper prefers to use the terms charge and voltage flux results in the moving of Oxygen atoms across an interface near a TiO layer, which in turn causes the resistance to change. If the current is removed, the resistance is still changed hence a bit state is stored. Presumably the Oxygen atoms can return if the current is restored in the reverse direction. I am guessing the charge and voltage applied would traverse a hysteresis sort of pattern not unlike the writing of old style magnetic core bits.
In order to make the device useful, would it not need an adjacent active switching device per bit to read the state? I fail to see how the technology will be useful without that, making it look pretty familiar. To be really practical, the memrister would need to be truly integrated into the transistor cell topology as with all DRAM, EPROM cells in which case it won’t be any smaller or denser.
I will take this a lot more seriously when they have a real addressable large scale memory device with circuit diagrams in an ISSCC paper.
BTW even current memory may not be as volatile as you think.
Try researching Vt shifts. You may or may not know that after power down, SRAM and DRAM cells that are used to store constant data can give up that information to those with patience, money, tools. SRAM cells start off as balanced with almost the same Vt on both sides. Repeatedly reading the same data from an SRAM cell over many cycles and time will move the Vt of some devices slightly, making them asymmetric so that on power up they will tend to power up the same way. The author of PGP describes this in the notes as a way to extract keys from an unpowered computer. He toggles the key data while PGP runs.
Also DRAM cells also don’t just lose data when powered off, they leak data away and that can take far longer than perhaps a few ms, it may take even several minutes for large parts of the array. Not quite non volatile or reliable enough to stretch out refresh cycles that long.
Also some vendors (like Motorola) have true non volatile DRAM using an extra magnetic component (see MRAM), but these are only available in small MByte sized chips. Many non volatile schemes have been proposed in the past, but only EEPROM and descendants remain.